Read an article this week in Science Daily (Chip upgrade help’s bee-sized drones navigate) about a recent chip created by MIT, called Navion, that reduces size and power consumption for electronics used in drone navigation. The chip is also documented on MIT’s Navion project homepage and in a technical paper describing the new VIO (Visual-Inertial Odometry ) Navion chip.
The Navion chip can perform inertial measurement at 52Khz as well as process video streams of 752×480 stereo images at 171 frames per second in a 20 sqmm package consuming only 24mW of power. The chip was fabricated on a 65nm CMOS process line.
Navion is the result of a collaborative design process which optimized electronics required to perform drone navigation processing. By placing all the memory required for inertial measurement and image analysis and all the processing hardware on the same chip, they have substantially reduced power consumption and space requirements for drone navigation.
Navion architecture
Navion uses a state of the art, non-linear factor graph optimization algorithm to navigate in space. It doesn’t sound like DL neural net image recognition but more like a statistical/probabilistic approach to image mapping and place estimation. The chip uses image compression, two stage memory, and sparse linear solver memory to reduce image processing memory requirements from 3.5MB to less than 1MB.
The chip uses 3 inputs: two images (right & left image) and IMU (inertial management unit sensor) and has one (complex output), its estimate of the current state of where it is on the map.
Navion processing creates and maintains a 3D map using stereo images and provides navigational support to move through that space. According to the paper, the Navion chip updates the state(s) and sparse 3D map at a KF (Kalman filter) rate of between 16 and 90 fps. Navion also offers configurations options to maximize accuracy, throughput or energy efficiency.
Navion compares well to other navigation electronics
The table shows comparisons of the Navion chip against other traditional navigational systems that use Xeon, ARM or FPGA chips. As far as I can tell it’s either much better or at least on a par with these other larger, more complex, power hungry systems.
Nano drones are coming to our space, sooner than anyone expects.
Comments?
Photo credit(s): System overview from Navion project page (c) 2018 MIT;
Picture of chip with layout from Navion project page (c) 2018 MIT;
